Processor improvements which became used in the IBM zArchitecture were described in U.S. Pat. No. 6,079,013 for “MULTIPROCESSOR SERIALIZATION WITH EARLY RELEASE OF PROCESSORS” by P. K. Mak et al issued Jun. 20, 2000. In a multiprocessor multi-nodal system like the IBM z900 machines a method to ensure system serialization (a system quiesce state) is needed to force all processors in the multiprocessor environment to temporarily suspend operations while one processor changes the system state. In a multiprocessor environment only one Processing Unit (PU) can change the system state at a time requiring all PU activity to be stopped beforehand. PU external Control Commands used by processors to signal one another are sent to request that PU's in the system suspend operations. The System Control Element (SCE) Quiesce network coordinates responses from all enabled processors across all configured nodes in the system and responds back to all enabled processing units (PU) that the system is stopped.